Alliance Memory AS29CF800x-55TIN Parallel NOR Flash Memories

Alliance Memory AS29CF800x-55TIN Parallel NOR Flash Memories are 8Mbit, 5V memories organized as 1,048,576 bytes of 8 bits or 524,288 words of 16 bits each. These memories use pins I/O0 to I/O7 for 8-bit data and pins I/O0 to I/O15 for 16-bit data. The AS29CF800x-55TIN Flash memories are available in 48-pin TSOP packages. These memories are designed to be programmed in-system with the standard system 5V VCC supply. The AS29CF800x-55TIN memories require only a single 5V power supply for both read and write functions. The program and erase functions use internally generated and regulated voltages.

The AS29CF800x-55TIN Flash memories are entirely software command set compatible with the JEDEC single-power-supply flash standard. These memories feature sector-erase architecture that allows memory sectors to be erased and reprogrammed without affecting the data contents of the device. The power-saving features allow the device to be placed in standby mode with greatly reduced power consumption.


  • Single power supply operation
    • 4.5V to 5.5V for read and write operations full voltage range
  • Access time
    • 55ns (max.)
  • Current
    • 20mA typical active read current
    • 30mA typical program/erase current
    • 6uA typical CMOS standby
  • Flexible sector architecture
    • 16KB/ 8KB x 2/ 32KB/ 64KB x 15 sectors
    • 8Kword/ 4Kword x 2/ 16Kword/ 32Kword x 15 sectors
    • Any combination of sectors can be erased
    • Supports full chip erase
    • Sector protection
      • A hardware method of protecting sectors to prevent any inadvertent program or erase operations within that sector. Temporary Sector Unprotect feature allows code changes in previously locked sectors
  • -40ºC to +85ºC industrial operating temperature range for U series
  • Unlock bypass program command
    • Reduces overall programming time when issuing multiple program command sequence
  • Top or bottom boot block configurations available
  • Embedded Algorithms
    • Embedded Erase algorithm will automatically erase the entire chip or any combination of designated sectors and verify the erased sectors
    • Embedded Program algorithm automatically writes and verifies data at specified addresses
  • Minimum 100,000 program/erase cycles per sector
  • 20-year data retention at 125ºC
    • Reliable operation for the life of the system
  • Compatible with JEDEC standards
    • Pinout and software compatible with single-power-supply Flash memory standard
    • Superior inadvertent write protection
  • Data polling and toggle bits
    • Provides a software method of detecting the completion of a program or erasing operations
  • Ready/BUSY pin (RY/BY)
    • Provides a hardware method of detecting the completion of a program or erasing operations
  • Erase Suspend/Erase Resume
    • Suspends a sector erase operation to read data from, or program data to, a non-erasing sector, then resumes the erase operation
  • Hardware reset pin (RESET)
    • Hardware method to reset the device to reading array data
  • Package options
    • 48-pin TSOP (I)
    • All Pb-free (Lead-free) products are RoHS2.0 compliant

Block Diagram

Block Diagram - Alliance Memory AS29CF800x-55TIN Parallel NOR Flash Memories
Published: 2019-10-22 | Updated: 2023-04-20