Broadcom BCM85667 16-Lane Retimer
Broadcom BCM85667 16-Lane Retimer is a 16-lane, low-power, low-latency, symmetrical PCIe Gen6, and CXL integrated MAC and PHY retimer. This Broadcom device extends the reach between a root complex (RC) and endpoint (EP) by >36dB of loss on both sides at 64GT/s. Each lane is capable of multiple data rates, including Gen6 (64G PAM4), Gen5 (32G), Gen4 (16G), Gen3 (8G), Gen2 (4G), and Gen1 (2.5G). The bifurcation mux and MAC support groups of 1x 16-lanes, 4x 4-lanes, and 8x 2-lanes. The user can bypass the mux and MAC for low-latency applications. The data path goes directly from SerDes to SerDes. The BCM85667 compensates for link loss by performing link training (LT) to automatically set the optimal TX-FIR settings.The receiver features an integrated and dynamic peaking filter, VGA, DFE, and CDR for signal recovery. The BCM85667 uses a cost-effective standard PCIe 100MHz reference clock. The pinout is compatible with the Intel® PCIe 6.0 Retimer Supplemental Footprint.
Features
- 16-lane, low-power, low-latency, symmetrical PCIe Gen6, and CXL 3.1 integrated MAC and PHY retimer
- Compatible with PCIe Gen6 / Gen5 / Gen4 / Gen3 / Gen2 / Gen1 and CXL 3.1 standards
- 64GT/s, 32GT/s, 16GT/s, 8GT/s, 5GT/s, and 2.5GT/s operation
- Supports parallel lane groupings per transfer - extends reach to >36dB at 64GT/s
- RX integrates multistage linear EQ and adaptive 16-tap DFE; TX uses 4-tap FIR taps
- Receiver is capable of operating at data rates with REFCLK, independent of the transmitter
- Provides clock and data recovery (CDR) tolerance of spread inputs up to 6000ppm relative to the reference clock
- Supports LT when connected with an LT-capable link partner
- Provides an adjustable loss-of-signal (LOS) detector
- Supports low-power modes
- Supports PCIe L0, L1, and L1 substates power modes
- Supports proprietary low-latency (LL) modes
- Intel proprietary inband LL entry and exit
- Broadcom proprietary inband LL entry and exit
Applications
- High-performance computing (HPC) and artificial intelligence (AI) servers for hyperscalers and data centers
- PCIe storage servers
- PCIe riser cards, interposer cards, and backplane
Block Diagram
Published: 2025-02-27
| Updated: 2025-03-03
