Microchip Technology ATSAM4E8 Arm-based Flash Microcontroller

Microchip Technology ATSAM4E8 Arm-based Flash Microcontroller (MCU) is based on the high-performance 32-bit Arm® Cortex®-M4 RISC processor and includes a Floating Point Unit (FPU). The ATSAM4E8 MCU delivers a maximum speed of 120MHz and features up to 1024 Kbytes of Flash, 2 Kbytes of cache memory, and up to 128 Kbytes of SRAM.

The ATSAM4E8 MCU offers a rich set of advanced connectivity peripherals, a single precision FPU, advanced analog features, and a full set of timing and control functions. The peripheral set includes a full-speed USB device port with an embedded transceiver, a 10/100 Mbps Ethernet MAC supporting IEEE 1588, a high-speed MCI for SDIO/SD/MMC, an external bus interface featuring a static memory controller providing connection to SRAM, PSRAM, NOR Flash, LCD Module and NAND Flash, a parallel I/O capture mode for camera interface, hardware acceleration for AES256, 2 USARTs, 2 UARTs, 2 TWIs, 3 SPIs, as well as a 4-channel PWM, three three-channel general-purpose 32-bit timers (with stepper motor and quadrature decoder logic support), a low-power RTC, a low-power RTT, 256-bit General Purpose Backup Registers, 2 Analog Front End interfaces (16-bit ADC, DAC, MUX, and PGA), one 12-bit DAC (2-channel), and an analog comparator.

The ATSAM4E8 has three software-selectable low-power modes: Sleep, Wait, and Backup. In Sleep mode, the processor is stopped while all other functions can be kept running. All clocks and functions are stopped in Wait mode, but some peripherals can be configured to wake up the system based on predefined conditions.

Real-time Event Management allows peripherals to receive, react to and send events in Active and Sleep modes without processor intervention.

Features

Core
- ARM Cortex-M4 with 2Kbytes Cache running at up to 120MHz
- Memory Protection Unit (MPU)
- DSP Instructions, Floating Point Unit (FPU), Thumb®-2 instruction set
Memories
- 512Kbytes Embedded Flash
- 128Kbytes Embedded SRAM
- 16Kbytes ROM with Embedded Boot Loader Routines (UART) and IAP Routines
- Static Memory Controller (SMC): SRAM, NOR, NAND Support
- NAND Flash Controller
- External Bus Interface: 8-bit Data, 4 Chip Selects, 24-bit Address
System
- Embedded voltage regulator for single-supply operation
- Power-on-Reset (POR), Brown-out Detector (BOD), and Dual Watchdog for Safe Operation
- Quartz or ceramic resonator oscillators: 3Mhz to 20MHz with clock failure detection and 32.768kHz for RTT or system clock
- High-precision 8/16/24MHz factory-trimmed internal RC oscillator
- One PLL up to 240MHz for Device Clock and the USB
- Temperature Sensor
- Low-power tamper detection on two inputs, anti-tampering by immediate clearing of general-purpose backup registers (GPBR)
- Up to 2 Peripheral DMA Controllers (PDC) with up to 33 Channels
- One 4-channel DMA Controller
Peripheral Features
- Two USARTs with USART1 (ISO7816, IrDA®, RS-485, SPI, Manchester and Modem Modes)
- USB 2.0 Device: Full Speed (12 Mbits), 2668 byte FIFO, up to 8 Endpoints. On-chip Transceiver
- Two 2-wire UARTs
- Two 2-wire Interfaces (TWI)
- High-speed Multimedia Card Interface (SDIO/SD Card/MMC)
- One Master/Slave Serial Peripheral Interface (SPI) with Chip Select Signals
- Three 3-channel 32-bit Timer/Counter blocks with Capture, Waveform, Compare, and PWM Mode
- Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
- 32-bit low-power Real-time Timer (RTT) and low-power Real-time Clock (RTC) with calendar and alarm features
- 256-bit General Purpose Backup Registers (GPBR)
- One Ethernet MAC (GMAC) 10/100 Mbps in MII mode only with dedicated DMA and Support for IEEE1588, Wake-on-LAN
- Two CAN Controllers with eight Mailboxes
- 4-channel 16-bit PWM with Complementary Output, Fault Input, and 12-bit Dead Time Generator Counter for Motor Control.
- Real-time Event Management

I/O
- Up to 117 I/O Lines with External Interrupt Capability (Edge or Level Sensitivity), Debouncing, Glitch Filtering
- Bidirectional Pad, Analog I/O, Programmable Pull-up/Pull-down
- Five 32-bit Parallel Input/Output Controllers, Peripheral DMA, Assisted Parallel Capture Mode
Cryptography
- AES 256-bit Key Algorithm compliant with FIPS Publication 197
Analog Features
- AFE (Analog Front End): 2x16-bit ADC, up to 24-channels, Differential Input Mode, Programmable Gain Stage, Auto Calibration, and Automatic Offset Correction
- One 2-channel 12-bit 1 Msps DAC
- One Analog Comparator with Flexible Input Selection, Selectable Input Hysteresis
Debugger Development Support
- Serial Wire/JTAG Debug Port (SWJ-DP)
- Debug access to all memories and registers in the system, including Cortex-M4 register bank, when the core is running, halted or held in reset
- Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access
- Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches
- Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling
- Instrumentation Trace Macrocell (ITM) for support of print style debugging
- IEEE1149.1 JTAG Boundary-scan on all digital pins
Integrated Software Libraries and Tools
- ASF-Atmel software Framework – SAM software development framework
- Integrated into the Atmel Studio IDE with a graphical user interface or available as a standalone for GCC, IAR compilers
- DMA support, Interrupt handlers, Driver support
- USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP, and Wi-Fi encryption Stacks
- RTOS integration, FreeRTOS is a core component
Low Power Modes
- Sleep, Wait, and Backup modes, down to 0.9μA in Backup mode with RTC, RTT, and GPBR
Temperature operating range
- Revision A - Industrial (-40° C to +85° C)
- Revision B - Commercial (-40° C to +105° C)
Package Options
- 144-ball LFBGA, 10mm x 10mm, pitch 0.8mm
- 144-lead LQFP, 20mm x 20mm, pitch 0.5mm